王海：男，電子科技大學副教授。博士、1985年3月出生，重慶人。2007年6月華中科技大學本科畢業， 2012年5月美國加州大學河濱分校博士畢業。2012年5月起在電子科技大學微固學院任教，副教授。主要研究領域為積體電路電子設計自動化（Electronic Design Automation）。曾參與完成多項美國國家自然基金項目，並與工業界Intel公司，Cadence公司合作，致力於積體電路功耗與熱分析，互連線建模與仿真，積體電路模型降階等方向的研究。已在國際會議與期刊上發表論文約30餘篇（詳見學術成果），並多次在國際會議上做學術報告與拓導報告（tutorial talk）。現擔任國際核心期刊IEEE TCAD、IEEE Trans. on Computers、IEEE TCAS II，及Integration, The VLSI Journal評審，並多次擔任電子設計自動化國際頂級會議DAC、ICCAD評審，以及ASP-DAC、DATE、ISQED技術委員會（TPC）委員。
研究方向1：眾核三維晶片功耗與溫度的緊湊建模及快速分析技術
研究簡介：眾核三維晶片（Many-Core 3D IC）是下一代晶片技術。其研發中面臨的最主要問題之一便是高集成度所帶來的高功率密度與高溫度問題。過高的晶片溫度將降低晶片可靠性與晶片運行性能，更可能對晶片造成不可逆轉的物理損害。本研究致力於研發晶片功耗與溫度的快速仿真分析技術。該技術將集成於考慮功耗與溫度因素的下一代晶片自動化設計工具中，提高3D IC性能並降低3D IC設計與製造成本。
研究資助：本研究由中國國家自然科學基金（NSFC）資助研究：三維積體電路熱可靠性快速分析與線上最佳化技術研究 ，國家自然科學基金，項目編號61404024，項目負責人：王海。
學術成果：
1. H. Wang, S. X.-D. Tan, D. Li, A. Gupta, and Y. Yuan, “Composable Thermal Modeling and Simulation for Architecture- Level Thermal Designs of Multi-core Microprocessors”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 18, no. 2, pp. 28:1-28:27, March, 2013.
2. Z. Liu, S. X.-D. Tan, H. Wang, Y. Hua, and A. Gupta, “Compact thermal modeling for packaged microprocessor design with practical power maps”, Integration, The VLSI Journal, vol. 47, no. 1, pp. 71-85, January, 2014.
3. H. Wang, D. Li, S. X.-D. Tan, M. Tirumala and A. X. Gupta “Composable thermal modeling and characterization for fast temperature estimation”, Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Austin, TX, Oct, 2010.
4. Z. Liu, S. X.-D. Tan, H. Wang, R. Quintanilla and A. Gupta, “Compact thermal modeling for package design with practical power maps”, 1st International IEEE Workshop on Thermal Modeling and Management: Chips to Data Centers (TEMM), pp. 1-5, Orlando, FL, July, 2011.
5. H. Wang, S. X.-D. Tan, G. Liao, R. Quintanilla and A. Gupta, “Full-chip runtime error-tolerant thermal estimation and prediction for practical thermal management”, Proc. IEEE/ACM International Conf. on Computer-Aided Design (ICCAD), pp.716-723, San Jose, CA, Nov. 2011.
6. H. Wang, S. X.-D. Tan, X. Liu, A. Gupta, “Runtime power estimator calibration for high-performance microprocessors”, Proc. Design, Automation and Test in Europe (DATE'12), pp.352-357, Dresden, Germany, March 2012.
7. Z. Liu, S. X.-D. Tan, H. Wang, A. Gupta and S. Swarup , “Compact nonlinear thermal modeling of packaged integrated systems”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’13), pp. 157-162, Yokohama, Japan, Jan. 2013.
8. H. Wang, M. Zhang, C. Zhang, H. Tang, X. Wang, "Improving the Accuracy of Module Based Thermal Modeling Method for VLSI Circuits Design", Proc. International Conference on Electron Devices and Solid-State Circuits (EDSSC'14), Chengdu, China, June 2014.
研究展示：
多核晶片快速熱分析（左上圖與右上圖）與三維晶片穩態熱分析（左下圖與右下圖）：
研究方向2：眾核三維晶片可靠性分析、設計最佳化，以及動態溫度管理技術
研究簡介：本研究注重在晶片設計與運行進行最佳化，在提高晶片可靠性的同時保障晶片最大運行性能。本研究包括晶片溫度穩態與瞬態行為對晶片可靠性影響的分析研究，晶片設計過程中對穩態性能進行最佳化的設計最佳化方法研究（包括晶片物理熱感測器放置方法以及晶片熱敏布局方法等），以及晶片運行過程中對瞬態性能進行最佳化的以動態溫度管理技術為代表的線上最佳化方法研究。
研究資助：本研究由中國國家自然科學基金（NSFC）資助研究：三維積體電路熱可靠性快速分析與線上最佳化技術研究 ，國家自然科學基金，項目編號61404024，項目負責人：王海。
研究合作：本研究與日本大阪大學橋本昌宜教授合作（2015年起）
學術成果：
1. Z. Liu, S. X.-D. Tan, X. Huang, and H. Wang, "Task migration for distributed thermal management considering transient effects", IEEE Transactions on Very Large Scale Integrated Circuits and Systems (TVLSI).
2. Z. Liu, T. Xu, S. X.-D. Tan, H. Wang, “Dynamic thermal management for multicore microprocessors considering transient thermal effects”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’13), pp.473-478, Yokohama, Japan, Jan. 2013.
3. H. Wang, S. X.-D. Tan, S. Swarup, X. Liu, “A power-driven thermal sensor placement algorithm for dynamic thermal management”, Proc. Design, Automation and Test in Europe (DATE'13), Grenoble, France, March 2013.
4.Z. Liu, X. Huang, S. X.-D. Tan, H. Wang, H. Tang, “Distributed task migration for thermal hot spot reduction in many-core microprocessors”, Proc. International Conference on ASIC (ASICON’13), Shenzhen, China, Oct. 2013. (invited)
5. J. Ma, H. Wang, S. X.-D. Tan, C. Zhang, H. Tang, "Hybrid Dynamic Thermal Management Method with Model Predictive Control", Proc. Asia Pacific Conference on Circuits and Systems (APCCAS'14), Okinawa, Japan, Nov. 2014.
研究展示：
晶片溫度感測器最佳化放置技術（上圖）與新型動態溫度管理技術（下圖）：
期刊論文：
J1. S. X.-D. Tan, B. Yan, and H. Wang, “Recent advance in non-Krylov subspace model order reduction of interconnect circuits”, Tsinghua Science and Technology, vol.15, no. 2, pp.151-168, April, 2010. (invited)
J2. H. Wang, H. Yu, and S. X.-D. Tan, “Fast timing analysis of clock networks considering environmental uncertainty”, Integration, The VLSI Journal, vol. 45, no. 4, pp. 376-387, September, 2012.
J3. H. Wang, S.X.-D. Tan, and R. Rakib, “Compact modeling of interconnect circuits over wide frequency band by adaptive complex-valued sampling method”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 17, no.1, pp.5:1-5:22, January 2012.
J4. R. Shen, S. X.-D. Tan, H. Wang, and J. Xiong, “Fast statistical full-chip leakage analysis for nanometer VLSI systems”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 17, no. 4, pp. 51:1-51:19, Sept. 2012.
J5. H. Wang, S. X.-D. Tan, D. Li, A. Gupta, and Y. Yuan, “Composable Thermal Modeling and Simulation for Architecture- Level Thermal Designs of Multi-core Microprocessors”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 18, no. 2, pp. 28:1-28:27, March, 2013.
J6. Z. Liu, S. X.-D. Tan, H. Wang, Y. Hua, and A. Gupta, “Compact thermal modeling for packaged microprocessor design with practical power maps”, Integration, The VLSI Journal, vol. 47, no. 1, pp. 71-85, January, 2014. ( One of the most downloaded papers in 2014 after its publication, 178 downloads in 3 months)
J7. Z. Liu, S. X.-D. Tan, X. Huang, and H. Wang, "Task migration for distributed thermal management considering transient effects", IEEE Transactions on Very Large Scale Integrated Circuits and Systems (TVLSI).
J8. Z. Liu, S. Swarup, S. X.-D. Tan, H. Chen, H. Wang, “Compact lateral thermal resistance model of TSVs for fast finite-difference based thermal analysis of 3D stacked ICs”, IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 33, no. 10. Oct. 2014.
J9. H. Chen, S. X-.D. Tan, D. H. Shin, X. Huang, H. Wang and G. Shi, “H2-Matrix-based Finite Element Linear Solver for Fast Transient Thermal Analysis of High-Performance ICs”, Int. J. Circ. Theor . Appl. (in press)
會議論文：
C1. B. Yan, H. Wang, and S. X.-D. Tan: A survey of RLCK reduction and simulation methods by fast truncated balanced realization, Int. Conf. Solid State and Integrated Circuit Technology (ICSICT), pp. 2236-2239, Beijing, China, Oct. 2008 (invited)
C2. H. Wang, H. Yu, and S. X.-D. Tan: Fast analysis of non-tree clock network considering environmental uncertainty by parameterized and incremental macromodeling, Proc. Asia South Pacific Design Automation Conference (ASP-DAC), pp. 379- 384, Yokohama, Japan, Jan. 2009.
C3. H. Yu, X. Liu, H. Wang, S. X.-D. Tan, “A fast analog mismatch analysis by an incremental and stochastic trajectory piecewise linear macromodel”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’10), pp.211-216, Taipei, Taiwan, Jan. 2010.
C4. H. Wang, S. X.-D. Tan, G. Chen, “Wideband reduced modeling of interconnect circuits by adaptive complex-valuedsampling method”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’10), pp.31-26, Taipei, Taiwan, Jan. 2010.
C5. H. Wang, D. Li, S. X.-D. Tan, M. Tirumala and A. X. Gupta “Composable thermal modeling and characterization for fast temperature estimation”, Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Austin, TX, Oct, 2010.
C6. S. X.-D. Tan, H. Wang, B. Yan, “UiMOR -- UC Riverside model order reduction tool for post-layout wideband interconnect modeling”, Int. Conf. Solid State and Integrated Circuit Technology (ICSICT’10), Shanghai, China, pp. 1769-1773, Oct. 2010. (invited)
C7. Z. Liu, S. X.-D. Tan, H. Wang, R. Quintanilla and A. Gupta, “Compact thermal modeling for package design with practical power maps”, 1st International IEEE Workshop on Thermal Modeling and Management: Chips to Data Centers (TEMM), pp. 1-5, Orlando, FL, July, 2011.
C8. Z. Liu, S. X.-D. Tan, H. Wang, R. Quintanilla and A. Gupta, “Compact behavioral thermal modeling for microprocessor design with spatially correlated power inputs”, TECHCON’2011 , Austin, TX, Sept. 2011.
C9. H. Wang, S. X.-D. Tan, G. Liao, R. Quintanilla and A. Gupta, “Full-chip runtime error-tolerant thermal estimation and prediction for practical thermal management”, Proc. IEEE/ACM International Conf. on Computer-Aided Design (ICCAD), pp.716-723, San Jose, CA, Nov. 2011.
C10. S. Swarup, S. X. -D. Tan, Z. Liu, H. Wang, Z. Hao and G. Shi, “Battery state of charge estimation using adaptive subspace identification method”, Proc. International Conference on ASIC (ASICON’11), pp. 91-94, Xiamen, China, Oct. 2011 (invited).
C11. X. Liu, S. X.-D. Tan, H. Wang and H. Yu, “A GPU-accelerated envelope following method for switching power converter simulation”, Proc. Design, Automation and Test in Europe (DATE'12), pp.1349-1354, Dresden, Germany, March 2012.
C12. X. Liu, S. X.-D. Tan, and H. Wang, “Parallel statistical analysis of analog circuits by GPU-accelerated graph-based approach”, Proc. Design, Automation and Test in Europe(DATE'12), pp.852-857, Dresden, Germany, March 2012.
C13. H. Wang, S. X.-D. Tan, X. Liu, A. Gupta, “Runtime power estimator calibration for high-performance microprocessors”, Proc. Design, Automation and Test in Europe (DATE'12), pp.352-357, Dresden, Germany, March 2012.
C14. X. Liu, S. X.-D. Tan, Z. Liu, H. Wang, T. Xu, “Transient analysis of large linear dynamic networks on hybrid GPU- multicore platforms”, 10th IEEE International NEWCAS Conference, pp. 173-176, Montreal, Canada, June, 2012.
C15. Z. Liu, S. X.-D. Tan, H. Wang, Y. Hua and A. Gupta, “Compact nonlinear thermal modeling of packaged microprocessors”, TECHCON’2012 , Austin, TX, Sept. 2012.
C16. Z. Liu, T. Xu, S. X.-D. Tan, H. Wang, “Dynamic thermal management for multicore microprocessors considering transient thermal effects”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’13), pp.473-478, Yokohama, Japan, Jan. 2013.
C17. Z. Liu, S. X.-D. Tan, H. Wang, A. Gupta and S. Swarup , “Compact nonlinear thermal modeling of packaged integrated systems”, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’13), pp. 157-162, Yokohama, Japan, Jan. 2013.
C18. H. Wang, S. X.-D. Tan, S. Swarup, X. Liu, “A power-driven thermal sensor placement algorithm for dynamic thermal management”, Proc. Design, Automation and Test in Europe (DATE'13), Grenoble, France, March 2013.
C19. Z. Liu, X. Huang, S. X.-D. Tan, H. Wang, H. Tang, “Distributed task migration for thermal hot spot reduction in many-core microprocessors”, Proc. International Conference on ASIC (ASICON’13), Shenzhen, China, Oct. 2013. (invited)
C20. H. Tang, Y. Peng, X. Lu, H. Wang, A. Wang, “Quantitative analysis for high speed interpolated/averaging ADC”, Proc. International Conference on ASIC (ASICON’13), Shenzhen, China, Oct. 2013. (invited)
C21. X. Liu, H. Wang, and S. X.-D. Tan, “Parallel power grid analysis using preconditioned GMRES solvers on CPU-GPU platforms”, Proc. International Conference on Computer-Aided Design (ICCAD’13), pp. 561-568, San Jose, CA, Nov. 2013.
C22. H. Wang, M. Zhang, C. Zhang, H. Tang, X. Wang, "Improving the Accuracy of Module Based Thermal Modeling Method for VLSI Circuits Design", Proc. International Conference on Electron Devices and Solid-State Circuits (EDSSC'14), Chengdu, China, June 2014.
C23. H. Tang, H. Zhao, H. Wang, “Power Optimization for Pipelined ADC Design”, Proc. International Conference on Electron Devices and Solid-State Circuits (EDSSC'14), Chengdu, China, June 2014. (invited)
C24.J. Ma, H. Wang, S. X.-D. Tan, C. Zhang, H. Tang, "Hybrid Dynamic Thermal Management Method with Model Predictive Control", Proc. Asia Pacific Conference on Circuits and Systems (APCCAS'14), Okinawa, Japan, Nov. 2014. ( win Student Travel Grant)
專著：
B1. Xue-Xin Liu, Hao Yu, Hai Wang, Sheldon X.-D. Tan, “Analog mismatch analysis by stochastic nonlinear macromodeling”, Chapter in “Analog Circuits: Applications, Design and Performances”, E. Tlelo-Cuautle (Editor), NOVA Science Publishers Inc., ISBN: 978-1-61324-355-8, Sept., 2011.
